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Microelectronics Systems

Course developed by: Mario Casu, (POLITO) Polytechnic University of Turin
Contact: mario.casunoSpam@polito.it

Course Description

The course aims at analyzing the design methodologies of complex microelectronic systems based on scalded MOS devices, considering the constraints and critical issues in designing architectural and microarchitectural blocks and detailing the technological aspects native to the design of structures based on devices and interconnections that are the state of the art od digital electronics. The analyzed aspects will be applied to some cases of study in laboratory sessions based on the use of specific CAD tools like HDL simulators, synthesizers, place&routers, layout editors, physical level simulators.

Learning Objectives

  • Knowledge of MOS based topologies and of its technology, of the related digital gates of their description at different level of abstraction and of their performance (standard cell libraries)
  • Knowledge of problems related to signal and power supply interconnects in integrated circuits and of the related design aspects 
  • Ability to design microarchitectural structures to be used as foundamental block in a digital integrated system for signal processing, as arithmetical blocks, hardwired and microprogrammed control systems and memory systems 
  • Knowledge of the manyfold techniques for describing, simulating and designing at circuit, architecture and system level, aiming at performance optimization (area, frequency, throughput, power consumption)
  • Ability in using CAD tools aiding the design of integrated circuits on scaled technologies: HDL simulators, synthesizer, place&router, layout editors, physical level simulators 
  • Ability in analyzing specifications and contraints when designing complex digital systems and choosing the correct algorithm 
  • Ability in evaluating computational complexity, interconnect bandwidth and numerical choices (number precision and data representation) for complex elaboration circuits
  • Knowledges on derivation of constraints on architecture, on resources allocation and scheduling 
  • Skill in the design of multi clock regimes
  • Knowledge on control systems as hardwired and microprogrammed control units
  • Basic knowledges on parallel integrated architectures

 

Link & Infos
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Course access (via PoLiTo)
Open access provided? No
Course duration: ~ 60 hours
Course type: e-learning
Target audience: Students at Master’s level
Course language: English
Is this course free? No
Self-paced course? Yes
Is the certificate / are the credentials free? No
Assessment type: In-class exam
Course/Training effort: 10 ECTS