Software-based error mitigation strategies for embedded memories

As a consequence of the ongoing digitalization, trust and reliability within embedded memories are becoming evermore important. A fundamental aspect to increase a memory’s reliability are methods and concepts, which allow a memory to autonomously detect and resolve its soft errors. Most mitigation strategies are realized using additional hardware chips, consequently increasing memory’s cost, processing speed and die-area. Thus, incorporating HW-based strategies into existing automation solutions usually requires the redesign of the whole system. Better option are software-based solutions (error correction and detection codes or software redundancy).

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Student Target Groups:

  • Students in ICE/Telematics and Comp. Science.

Thesis Type:

  • Bachelor Thesis / Master Project.

Required Prior Knowledge:

  • Solid background in embedded systems;
  • Programming skills in C/C++;
  • Architecture of the embedded memories;
  • Interest in Fault-tolerant systems;

Goals and Tasks:

  • Overview of the exiting software-based mitigation strategies;
  • Implementation of different strategies on real CPUs;
  • Measurements and comparison of performances (overheads, speed, complexity, etc) between strategies;

Duration in months

  • 6 months

Start:

  • As soon as possible

Contact: